JOB DESCRIPTION：
1. Module-level architecture definition and design;
2. Module-level RTL implementation, synthesis;
3. Simulation/Verification at both module level and system level;
4. Writing design spec and report;
5. FPGA/Silicon debug on related modules.
JOB QUALIFICATIONS：
1. Bachelor degree or Master degree in ASIC Design Relevant;
2. >1 year of SoC design experience;
3. Solid knowledge on digital IC design; Strong skills of Verilog RTL coding and simulation; Hands-on experiences on EDA tools, such as Cadence and Synopsys tools; Familiar with C language;
4. Relevant experiences on peripheral module design. Such as NAND, SPI FLASH and SmartCard.
